Special issue on network-based many-core embedded systems

Many-core embedded system will integrate a large number of cores (several hundred) in order to meet the performance requirements of parallel applications. As the number of cores integrated into a chip increases, the conventional on-chip communication becomes power and performance bottleneck in many-core embedded systems. Network-on-Chip (NoC) architectures have been emerged as the most viable solution to meet the performance and design productivity requirements of the complex on-chip communication infrastructure in many-core embedded systems. NoC provides an infrastructure for better modularity, scalability, fault-tolerance, and higher bandwidth compared to traditional infrastructures. Topics of interest include, but are not limited to: NoC architecture for many-core embedded system Task mapping and scheduling Quality of service and reliability issues Physical design of interconnects and switches Design exploration for 3D stacked logic and memory Synthesis, verify, debug and test Formal modeling and verification Performance and power issues Re-configurability Optical NoCs FPGAs for NoCs Unicast and multicast communication protocols On-chip learning and adaptation