Low Power Reversible Parallel Binary Adder/Subtractor
نویسندگان
چکیده
منابع مشابه
Low Power Reversible Parallel Binary Adder/Subtractor
In recent years, Reversible Logic is becoming more and more prominent technology having its applications in Low Power CMOS, Quantum Computing, Nanotechnology, and Optical Computing. Reversibility plays an important role when energy efficient computations are considered. In this paper, Reversible eight-bit Parallel Binary Adder/Subtractor with Design I, Design II and Design III are proposed. In ...
متن کاملDesign A Low Power eight-bit Reversible Parallel Binary Adder/Subtractor
Reversible Logic is becoming more and more prominent technology having its applications inLow Power CMOS, Quantum Computing, Nanotechnology, and Optical Computing. Reversibility plays an important role when energy efficient computations are considered. In this paper, Reversible eight-bit Parallel proposed. In all the three design approaches, the full Adder and Subtractors are realized in a sing...
متن کاملDesign A Low Power eight-bit Reversible Parallel Binary Adder/Subtractor
Reversible Logic is becoming more and more prominent technology having its applications inLow Power CMOS, Quantum Computing, Nanotechnology, and Optical Computing. Reversibility plays an important role when energy efficient computations are considered. In this paper, Reversible eight-bit Parallel proposed. In all the three design approaches, the full Adder and Subtractors are realized in a sing...
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In recent years low power and small size are the keyword in the IC industry. This is where the importance of reversible gate and QCA (Quantum dot cellular automata) comes in. In nonreversible gates there is a definite amount of power loss involved. Interest in reversible computation arises from the desire to reduce heat dissipation, thereby allowing – higher densities and higher speed. The QCA ...
متن کاملTitle: Developing a Low Power Reversible Processor
Laboratory where thesis will be done: Artiicial Intelligence Laboratory Brief Statement of the Problem: Reducing the power consumed by microprocessors is a signiicant problem. A reversible architecture is proposed which allows energy to be recovered rather than dissipated. Extensive simulations will be performed but no hardware is planned at this time. Supervision Agreement: The program outline...
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ژورنال
عنوان ژورنال: International Journal of VLSI Design & Communication Systems
سال: 2010
ISSN: 0976-1527,0976-1357
DOI: 10.5121/vlsic.2010.1303