Low-Power High-Speed Double Gate 1-bit Full Adder Cell
نویسندگان
چکیده
منابع مشابه
Ultra Low Power 1-Bit Full Adder
In this paper we propose a new 9 transistor 1-bit full adder. The proposed circuit performs efficiently in subthreshold region to employ in ultra low power applications. The main design objective for this new circuit is low power consumption and full voltage swing at a low supply voltage. The proposed cell also remarkably improves the power consumption, power delay product and has better noise ...
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ژورنال
عنوان ژورنال: International Journal of Electronics and Telecommunications
سال: 2016
ISSN: 2300-1933
DOI: 10.1515/eletel-2016-0045