Low Power Area Efficient Multiplier Using Shannon Based Multiplexing Logic
نویسندگان
چکیده
منابع مشابه
Area Efficient Low Power Vedic Multiplier Design Using GDI Technique
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ژورنال
عنوان ژورنال: International Journal of Embedded Systems and Applications
سال: 2012
ISSN: 1839-5171
DOI: 10.5121/ijesa.2012.2202