Development of Frequency-Fixed All-Pass Filter-Based Single-Phase Phase-Locked Loop

Phase-locked loops (PLL) are widely used in the synchronization of grid interfaced power converters. One solution is based on orthogonal signal generation (OSG), which requires frequency information for their appropriate operation. This article developed a new to achieve PLL function single-phase interconnection but eradicate additional feedback traditional architecture all-pass filter (APF-PLL). Four topologies along with small-signal modeling and dynamic analysis. A thorough comparison among them response, steady-state accuracy, implementation, disturbance rejection capability carried out. Finally, best approach frequency-fixed (FF) APF-PLL experimentally evaluated adaptive FF PLLs belonging time delay (TD) second-order generalized integrator (SOGI) families.