Design and Analysis of Area and Power Efficient 1-Bit Full Subtractor using 120nm Technology
نویسندگان
چکیده
منابع مشابه
a low-power and low-energy 1-bit full adder cell using 32nm cnfet technology node
full adder cell is often placed in the critical path of other circuits. therefore it plays an important role in determining the entire performance of digital system. moreover, portable electronic systems rely on battery and low-power design is another concern. in conclusion it is a vital task to design high-performance and low-power full adder cells. since delay opposes against power consumptio...
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ژورنال
عنوان ژورنال: International Journal of Computer Applications
سال: 2014
ISSN: 0975-8887
DOI: 10.5120/15408-3978