Bitwise Logical Operations in VCMA-MRAM

Today’s technology demands compact, portable, fast, and energy-efficient devices. One approach to making devices is an in-memory computation that addresses the memory bottleneck issues of present computing system by utilizing a spintronic device viz. magnetic tunnel junction (MTJ). Further, area energy can be reduced through approximate computation. We circuit design based on logic-in-memory paradigm voltage-controlled anisotropy magnetoresistive random access (VCMA-MRAM). During computation, multiple bit cells within array are selected in parallel activating word lines. The designed performs all logic operations-Read/NOT, AND/NAND, OR/NOR, arithmetic SUM operation (1-bit adder with 75% accuracy for accurate carry out) slight modification using control signals. All simulations have been performed at 45 nm CMOS node VCMA-MTJ compact model HSPICE simulator. Simulation results show proposed circuit’s consumes about 300% less 2.3 times faster than its counterpart exact adder.